SDMA0_RLC5_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 2225 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_RLC5_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                       0x10
SDMA0_RLC5_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 2443 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_RLC5_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                       0x10
SDMA0_RLC5_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 2433 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_RLC5_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                       0x10