SDMA0_RLC5_RB_CNTL__RB_PRIV__SHIFT 2226 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_RLC5_RB_CNTL__RB_PRIV__SHIFT                                                                    0x17
SDMA0_RLC5_RB_CNTL__RB_PRIV__SHIFT 2444 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_RLC5_RB_CNTL__RB_PRIV__SHIFT                                                                    0x17
SDMA0_RLC5_RB_CNTL__RB_PRIV__SHIFT 2434 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_RLC5_RB_CNTL__RB_PRIV__SHIFT                                                                    0x17