SDMA0_RLC5_RB_BASE_HI__ADDR_MASK 2243 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_RLC5_RB_BASE_HI__ADDR_MASK 0x00FFFFFFL SDMA0_RLC5_RB_BASE_HI__ADDR_MASK 2459 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_RLC5_RB_BASE_HI__ADDR_MASK 0x00FFFFFFL SDMA0_RLC5_RB_BASE_HI__ADDR_MASK 2449 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_RLC5_RB_BASE_HI__ADDR_MASK 0x00FFFFFFL