SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 1508 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT                                                               0x0
SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 1292 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 0x0
SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 1428 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 0x0
SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 1906 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 0x0
SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 2216 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 0x0
SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 1712 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT	0x0
SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 1518 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT                                                               0x0
SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 1732 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT                                                               0x0
SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT 1722 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_RLC1_RB_RPTR_ADDR_HI__ADDR__SHIFT                                                               0x0