SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT 1304 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT                                                                  0x0
SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT 1512 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT	0x0
SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT 1318 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT                                                                  0x0
SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT 1530 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT                                                                  0x0
SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT 1520 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_RLC0_RB_WPTR_HI__OFFSET__SHIFT                                                                  0x0