SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 1321 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT                                                               0x2
SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 1196 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 0x2
SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 1316 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 0x2
SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 1766 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 0x2
SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 2082 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 0x2
SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 1529 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT	0x2
SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 1335 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT                                                               0x2
SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 1548 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT                                                               0x2
SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 1538 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT                                                               0x2