SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 1318 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT                                                               0x0
SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 1194 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 0x0
SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 1314 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 0x0
SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 1764 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 0x0
SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 2080 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 0x0
SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 1526 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT	0x0
SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 1332 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT                                                               0x0
SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 1544 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT                                                               0x0
SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT 1534 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_RLC0_RB_RPTR_ADDR_HI__ADDR__SHIFT                                                               0x0