SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT 1427 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT                                                                 0x0
SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT 1844 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT 0x0
SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT 2160 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT 0x0
SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT 1633 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT	0x0
SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT 1439 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT                                                                 0x0
SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT 1653 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT                                                                 0x0
SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT 1643 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_RLC0_MIDCMD_DATA1__DATA1__SHIFT                                                                 0x0