SDMA0_PUB_REG_TYPE1__SDMA0_UCODE_CHECKSUM__SHIFT  224 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_PUB_REG_TYPE1__SDMA0_UCODE_CHECKSUM__SHIFT	0x9
SDMA0_PUB_REG_TYPE1__SDMA0_UCODE_CHECKSUM__SHIFT  221 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_PUB_REG_TYPE1__SDMA0_UCODE_CHECKSUM__SHIFT                                                      0x9
SDMA0_PUB_REG_TYPE1__SDMA0_UCODE_CHECKSUM__SHIFT  224 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_PUB_REG_TYPE1__SDMA0_UCODE_CHECKSUM__SHIFT                                                      0x9
SDMA0_PUB_REG_TYPE1__SDMA0_UCODE_CHECKSUM__SHIFT  224 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_PUB_REG_TYPE1__SDMA0_UCODE_CHECKSUM__SHIFT                                                      0x9