SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT 1498 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT 0x4
SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT 1826 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT 0x4
SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT  183 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT	0x1c
SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT  180 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT                                                                0x1c
SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT  183 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT                                                                0x1c
SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT  183 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CNTL__SHIFT                                                                0x1c