SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT 1496 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT 0x3
SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT 1824 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT 0x3
SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT  182 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT	0x1b
SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT  179 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT                                                            0x1b
SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT  182 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT                                                            0x1b
SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT  182 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CLK_CTRL__SHIFT                                                            0x1b