SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT 1500 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT 0x5
SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT 1828 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT 0x5
SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT  184 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT	0x1d
SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT  181 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT                                                        0x1d
SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT  184 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT                                                        0x1d
SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT  184 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_PUB_REG_TYPE0__SDMA0_CHICKEN_BITS__SHIFT                                                        0x1d