SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT   44 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT                                                               0x0
SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT  358 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT	0x0
SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT  353 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT                                                               0x0
SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT  360 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT                                                               0x0
SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT  354 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_POWER_CNTL__PG_CNTL_ENABLE__SHIFT                                                               0x0