SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT   49 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT                                                              0x9
SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT  918 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 0x9
SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 1424 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 0x9
SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT  362 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT	0x9
SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT  358 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT                                                              0x9
SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT  365 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT                                                              0x9
SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT  359 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT                                                              0x9