SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 50 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 920 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 1426 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 363 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 359 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 366 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 360 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_POWER_CNTL__MEM_POWER_DS_EN__SHIFT 0xa