SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT  662 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT                                                                  0x10
SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT 1392 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT 0x10
SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT 1726 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT 0x0
SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT  930 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT	0x10
SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT  929 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT                                                                  0x10
SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT  952 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT                                                                  0x10
SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT  946 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_POWER_CNTL_IDLE__DELAY1__SHIFT                                                                  0x10