SDMA0_PHASE0_QUANTUM__PREFER__SHIFT  312 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT                                                                   0x1e
SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 1016 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 0x1e
SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 1106 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 0x1e
SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 1126 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 0x1e
SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 1632 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT 0x1e
SDMA0_PHASE0_QUANTUM__PREFER__SHIFT  598 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT	0x1e
SDMA0_PHASE0_QUANTUM__PREFER__SHIFT  597 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT                                                                   0x1e
SDMA0_PHASE0_QUANTUM__PREFER__SHIFT  606 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT                                                                   0x1e
SDMA0_PHASE0_QUANTUM__PREFER__SHIFT  600 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_PHASE0_QUANTUM__PREFER__SHIFT                                                                   0x1e