SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT  924 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT                                                            0x0
SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 1090 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 0x0
SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 1194 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 0x0
SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 1604 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 0x0
SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 1926 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 0x0
SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 1140 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT	0x0
SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 1132 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT                                                            0x0
SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 1154 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT                                                            0x0
SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT 1144 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_GFX_RB_WPTR_POLL_CNTL__ENABLE__SHIFT                                                            0x0