SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT  892 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                        0x10
SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1076 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10
SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1180 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10
SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1590 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10
SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1912 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10
SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1110 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT	0x10
SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1102 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                        0x10
SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1124 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                        0x10
SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 1114 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT                                                        0x10