SDMA0_F32_CNTL__HALT__SHIFT  290 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_F32_CNTL__HALT__SHIFT                                                                           0x0
SDMA0_F32_CNTL__HALT__SHIFT 1004 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_F32_CNTL__HALT__SHIFT 0x0
SDMA0_F32_CNTL__HALT__SHIFT 1090 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_F32_CNTL__HALT__SHIFT 0x0
SDMA0_F32_CNTL__HALT__SHIFT 1110 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_F32_CNTL__HALT__SHIFT 0x0
SDMA0_F32_CNTL__HALT__SHIFT 1616 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_F32_CNTL__HALT__SHIFT 0x0
SDMA0_F32_CNTL__HALT__SHIFT  582 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_F32_CNTL__HALT__SHIFT	0x0
SDMA0_F32_CNTL__HALT__SHIFT  581 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_F32_CNTL__HALT__SHIFT                                                                           0x0
SDMA0_F32_CNTL__HALT__SHIFT  590 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_F32_CNTL__HALT__SHIFT                                                                           0x0
SDMA0_F32_CNTL__HALT__SHIFT  584 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_F32_CNTL__HALT__SHIFT                                                                           0x0