SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT  395 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT                                                      0xf
SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT  681 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT	0xf
SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT  680 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT                                                      0xf
SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT  696 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT                                                      0x17
SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT  690 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_SPLIT_DAT_BUF_SED__SHIFT                                                      0x17