SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT  383 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT                                                         0x3
SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT  669 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT	0x3
SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT  668 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT                                                         0x3
SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT  676 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT                                                         0x3
SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT  670 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_EDC_COUNTER__SDMA_IB_CMD_BUF_SED__SHIFT                                                         0x3