SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT  361 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT                                                               0x2
SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 1064 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2
SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 1154 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2
SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 1174 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2
SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 1680 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2
SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT  647 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT	0x2
SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT  646 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT                                                               0x2
SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT  655 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT                                                               0x2
SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT  649 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT                                                               0x2