SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT  101 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT                                                                  0x1d
SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT  880 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT 0x1d
SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT  950 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT 0x1d
SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT  968 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT 0x1d
SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT 1474 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT 0x1d
SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT  407 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT	0x1d
SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT  406 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT                                                                  0x1d
SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT  413 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT                                                                  0x1d
SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT  407 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_CNTL__FROZEN_INT_ENABLE__SHIFT                                                                  0x1d