SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT   99 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT                                                                  0x12
SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT  874 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT 0x12
SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT  944 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT 0x12
SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT  962 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT 0x12
SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT 1468 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT 0x12
SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT  405 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT	0x12
SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT  404 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT                                                                  0x12
SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT  411 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT                                                                  0x12
SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT  405 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_CNTL__AUTO_CTXSW_ENABLE__SHIFT                                                                  0x12