SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT  128 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT                                                           0x17
SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT  888 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT 0x17
SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT  964 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT 0x17
SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT  982 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT 0x17
SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT 1488 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT 0x17
SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT  429 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT	0x17
SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT  428 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT                                                           0x17
SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT  435 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT                                                           0x17
SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT  429 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_CHICKEN_BITS__CG_STATUS_OUTPUT__SHIFT                                                           0x17