SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT  426 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT                                                       0x1f
SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT 1212 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT 0x1f
SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT 1720 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT 0x1f
SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT  712 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT	0x1f
SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT  711 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT                                                       0x1f
SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT  734 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT                                                       0x1f
SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT  728 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_ATOMIC_CNTL__ATOMIC_RTN_INT_ENABLE__SHIFT                                                       0x1f