SDMA0_ACTIVE_FCN_ID__VFID__SHIFT 39975 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA0_ACTIVE_FCN_ID__VFID__SHIFT                                                                      0x0
SDMA0_ACTIVE_FCN_ID__VFID__SHIFT 1196 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA0_ACTIVE_FCN_ID__VFID__SHIFT 0x0
SDMA0_ACTIVE_FCN_ID__VFID__SHIFT 1696 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA0_ACTIVE_FCN_ID__VFID__SHIFT 0x0
SDMA0_ACTIVE_FCN_ID__VFID__SHIFT   42 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA0_ACTIVE_FCN_ID__VFID__SHIFT	0x0
SDMA0_ACTIVE_FCN_ID__VFID__SHIFT   42 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA0_ACTIVE_FCN_ID__VFID__SHIFT                                                                      0x0
SDMA0_ACTIVE_FCN_ID__VFID__SHIFT   42 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA0_ACTIVE_FCN_ID__VFID__SHIFT                                                                      0x0
SDMA0_ACTIVE_FCN_ID__VFID__SHIFT   42 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA0_ACTIVE_FCN_ID__VFID__SHIFT                                                                      0x0