SC_QZ1_TILE_COVERED_COUNT 1229 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_enum.h 	SC_QZ1_TILE_COVERED_COUNT                        = 0x58,
SC_QZ1_TILE_COVERED_COUNT 1414 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_enum.h 	SC_QZ1_TILE_COVERED_COUNT                        = 0x58,
SC_QZ1_TILE_COVERED_COUNT 1432 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h 	SC_QZ1_TILE_COVERED_COUNT                        = 0x58,
SC_QZ1_TILE_COVERED_COUNT 18970 drivers/gpu/drm/amd/include/navi10_enum.h SC_QZ1_TILE_COVERED_COUNT                = 0x00000054,
SC_QZ1_TILE_COVERED_COUNT 20846 drivers/gpu/drm/amd/include/vega10_enum.h SC_QZ1_TILE_COVERED_COUNT                = 0x00000058,