SC_QZ0_TILE_COVERED_COUNT 1228 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_enum.h 	SC_QZ0_TILE_COVERED_COUNT                        = 0x57,
SC_QZ0_TILE_COVERED_COUNT 1413 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_enum.h 	SC_QZ0_TILE_COVERED_COUNT                        = 0x57,
SC_QZ0_TILE_COVERED_COUNT 1431 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h 	SC_QZ0_TILE_COVERED_COUNT                        = 0x57,
SC_QZ0_TILE_COVERED_COUNT 18969 drivers/gpu/drm/amd/include/navi10_enum.h SC_QZ0_TILE_COVERED_COUNT                = 0x00000053,
SC_QZ0_TILE_COVERED_COUNT 20845 drivers/gpu/drm/amd/include/vega10_enum.h SC_QZ0_TILE_COVERED_COUNT                = 0x00000057,