ROM_SW_CNTL__DATA_SIZE__SHIFT 5316 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define ROM_SW_CNTL__DATA_SIZE__SHIFT 0x0
ROM_SW_CNTL__DATA_SIZE__SHIFT 5508 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define ROM_SW_CNTL__DATA_SIZE__SHIFT 0x0
ROM_SW_CNTL__DATA_SIZE__SHIFT 4724 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define ROM_SW_CNTL__DATA_SIZE__SHIFT 0x0
ROM_SW_CNTL__DATA_SIZE__SHIFT 5694 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define ROM_SW_CNTL__DATA_SIZE__SHIFT 0x0
ROM_SW_CNTL__DATA_SIZE__SHIFT 5852 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define ROM_SW_CNTL__DATA_SIZE__SHIFT 0x0
ROM_SW_CNTL__DATA_SIZE__SHIFT  330 drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_11_0_0_sh_mask.h #define ROM_SW_CNTL__DATA_SIZE__SHIFT                                                                         0x0
ROM_SW_CNTL__DATA_SIZE__SHIFT   51 drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_9_0_sh_mask.h #define ROM_SW_CNTL__DATA_SIZE__SHIFT                                                                         0x0