RMI_UTCL1_CNTL1__ENABLE_LFIFO_PRI_ARB__SHIFT 11320 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define RMI_UTCL1_CNTL1__ENABLE_LFIFO_PRI_ARB__SHIFT 0x12 RMI_UTCL1_CNTL1__ENABLE_LFIFO_PRI_ARB__SHIFT 6285 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define RMI_UTCL1_CNTL1__ENABLE_LFIFO_PRI_ARB__SHIFT 0x12 RMI_UTCL1_CNTL1__ENABLE_LFIFO_PRI_ARB__SHIFT 6048 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define RMI_UTCL1_CNTL1__ENABLE_LFIFO_PRI_ARB__SHIFT 0x12 RMI_UTCL1_CNTL1__ENABLE_LFIFO_PRI_ARB__SHIFT 5927 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define RMI_UTCL1_CNTL1__ENABLE_LFIFO_PRI_ARB__SHIFT 0x12