RLC_UTCL1_STATUS_2__RESERVED__SHIFT 33950 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define RLC_UTCL1_STATUS_2__RESERVED__SHIFT                                                                   0xa
RLC_UTCL1_STATUS_2__RESERVED__SHIFT 23654 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define RLC_UTCL1_STATUS_2__RESERVED__SHIFT                                                                   0xa
RLC_UTCL1_STATUS_2__RESERVED__SHIFT 24967 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define RLC_UTCL1_STATUS_2__RESERVED__SHIFT                                                                   0xa
RLC_UTCL1_STATUS_2__RESERVED__SHIFT 25030 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define RLC_UTCL1_STATUS_2__RESERVED__SHIFT                                                                   0xa