RLC_SMU_MESSAGE__CMD__SHIFT 33684 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define RLC_SMU_MESSAGE__CMD__SHIFT                                                                           0x0
RLC_SMU_MESSAGE__CMD__SHIFT 23361 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define RLC_SMU_MESSAGE__CMD__SHIFT                                                                           0x0
RLC_SMU_MESSAGE__CMD__SHIFT 24674 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define RLC_SMU_MESSAGE__CMD__SHIFT                                                                           0x0
RLC_SMU_MESSAGE__CMD__SHIFT 24738 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define RLC_SMU_MESSAGE__CMD__SHIFT                                                                           0x0
RLC_SMU_MESSAGE__CMD__SHIFT 9098 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define RLC_SMU_MESSAGE__CMD__SHIFT 0x0
RLC_SMU_MESSAGE__CMD__SHIFT 9640 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define RLC_SMU_MESSAGE__CMD__SHIFT 0x0