RLC_PG_CNTL__RESERVED__SHIFT 33378 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define RLC_PG_CNTL__RESERVED__SHIFT                                                                          0x5
RLC_PG_CNTL__RESERVED__SHIFT 23032 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define RLC_PG_CNTL__RESERVED__SHIFT                                                                          0x5
RLC_PG_CNTL__RESERVED__SHIFT 24345 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define RLC_PG_CNTL__RESERVED__SHIFT                                                                          0x5
RLC_PG_CNTL__RESERVED__SHIFT 24396 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define RLC_PG_CNTL__RESERVED__SHIFT                                                                          0x5
RLC_PG_CNTL__RESERVED__SHIFT 7237 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define RLC_PG_CNTL__RESERVED__SHIFT 0x00000004
RLC_PG_CNTL__RESERVED__SHIFT 7848 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define RLC_PG_CNTL__RESERVED__SHIFT 0x4
RLC_PG_CNTL__RESERVED__SHIFT 8752 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define RLC_PG_CNTL__RESERVED__SHIFT 0x5
RLC_PG_CNTL__RESERVED__SHIFT 9304 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define RLC_PG_CNTL__RESERVED__SHIFT 0x5