RLC_PG_CNTL__RESERVED1__SHIFT 33385 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define RLC_PG_CNTL__RESERVED1__SHIFT                                                                         0x14
RLC_PG_CNTL__RESERVED1__SHIFT 23039 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define RLC_PG_CNTL__RESERVED1__SHIFT                                                                         0x14
RLC_PG_CNTL__RESERVED1__SHIFT 24352 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define RLC_PG_CNTL__RESERVED1__SHIFT                                                                         0x14
RLC_PG_CNTL__RESERVED1__SHIFT 24403 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define RLC_PG_CNTL__RESERVED1__SHIFT                                                                         0x14
RLC_PG_CNTL__RESERVED1__SHIFT 7235 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define RLC_PG_CNTL__RESERVED1__SHIFT 0x00000013
RLC_PG_CNTL__RESERVED1__SHIFT 7856 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define RLC_PG_CNTL__RESERVED1__SHIFT 0x13
RLC_PG_CNTL__RESERVED1__SHIFT 8768 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define RLC_PG_CNTL__RESERVED1__SHIFT 0x15
RLC_PG_CNTL__RESERVED1__SHIFT 9318 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define RLC_PG_CNTL__RESERVED1__SHIFT 0x14