RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 33113 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT                                                                0x1
RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 22744 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT                                                                0x1
RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 24057 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT                                                                0x1
RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 24060 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT                                                                0x1
RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 7199 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 0x00000001
RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 7732 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 0x1
RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 8546 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 0x1
RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 9098 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define RLC_MEM_SLP_CNTL__RLC_MEM_DS_EN__SHIFT 0x1