RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 12620 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 0x2
RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 12626 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 0x2
RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 13242 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 0x2
RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 56092 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT                                                 0x2
RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 11518 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 0x2
RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT  967 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT                                                 0x2
RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT 59157 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define RIRB_STATUS__RESPONSE_OVERRUN_INTERRUPT_STATUS__SHIFT                                                 0x2