REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 1438 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 0x1
REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 1342 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 0x1
REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 1448 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 0x1
REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 2399 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT                                                                    0x1
REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT 1829 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT                                                                    0x1
REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT  456 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT                                                                    0x1
REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT  338 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define REFCLK_CNTL__REFCLK_SRC_SEL__SHIFT                                                                    0x1