RCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_CONTROL__MASK_BIT__SHIFT 82680 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define RCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_CONTROL__MASK_BIT__SHIFT                                             0x0
RCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_CONTROL__MASK_BIT__SHIFT 47700 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define RCC_DEV0_EPF0_VF12_GFXMSIX_VECT1_CONTROL__MASK_BIT__SHIFT                                             0x0