PSWUSCFG0_PCIE_VC1_RESOURCE_CNTL__VC_ENABLE_MASK  635 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define PSWUSCFG0_PCIE_VC1_RESOURCE_CNTL__VC_ENABLE_MASK                                                      0x80000000L
PSWUSCFG0_PCIE_VC1_RESOURCE_CNTL__VC_ENABLE_MASK  663 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define PSWUSCFG0_PCIE_VC1_RESOURCE_CNTL__VC_ENABLE_MASK                                                      0x80000000L