PSWUSCFG0_IRQ_BRIDGE_CNTL__SERR_EN_MASK  197 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define PSWUSCFG0_IRQ_BRIDGE_CNTL__SERR_EN_MASK                                                               0x0002L
PSWUSCFG0_IRQ_BRIDGE_CNTL__SERR_EN_MASK  197 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define PSWUSCFG0_IRQ_BRIDGE_CNTL__SERR_EN_MASK                                                               0x0002L