PSWUSCFG0_IRQ_BRIDGE_CNTL__SECONDARY_BUS_RESET_MASK  202 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define PSWUSCFG0_IRQ_BRIDGE_CNTL__SECONDARY_BUS_RESET_MASK                                                   0x0040L
PSWUSCFG0_IRQ_BRIDGE_CNTL__SECONDARY_BUS_RESET_MASK  202 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define PSWUSCFG0_IRQ_BRIDGE_CNTL__SECONDARY_BUS_RESET_MASK                                                   0x0040L