PSWUSCFG0_DEVICE_CAP2__MAX_END_END_TLP_PREFIXES__SHIFT  402 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define PSWUSCFG0_DEVICE_CAP2__MAX_END_END_TLP_PREFIXES__SHIFT                                                0x16
PSWUSCFG0_DEVICE_CAP2__MAX_END_END_TLP_PREFIXES__SHIFT  409 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define PSWUSCFG0_DEVICE_CAP2__MAX_END_END_TLP_PREFIXES__SHIFT                                                0x16