PPLL_MODE_CNTL__reg_tmg_pwr_state__SHIFT 18361 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define PPLL_MODE_CNTL__reg_tmg_pwr_state__SHIFT 0x10
PPLL_MODE_CNTL__reg_tmg_pwr_state__SHIFT  354 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define PPLL_MODE_CNTL__reg_tmg_pwr_state__SHIFT                                                              0x10