PPLL_FREQ_CTRL0__reg_tmg_fcw0_int_MASK 18364 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define PPLL_FREQ_CTRL0__reg_tmg_fcw0_int_MASK 0x1ff0000
PPLL_FREQ_CTRL0__reg_tmg_fcw0_int_MASK  362 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define PPLL_FREQ_CTRL0__reg_tmg_fcw0_int_MASK                                                                0x01FF0000L