PM_FUSES_5__VddCVid_3_MASK 3659 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define PM_FUSES_5__VddCVid_3_MASK 0xff
PM_FUSES_5__VddCVid_3_MASK 3657 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define PM_FUSES_5__VddCVid_3_MASK 0xff
PM_FUSES_5__VddCVid_3_MASK 2857 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define PM_FUSES_5__VddCVid_3_MASK 0xff