PM_FUSES_5__VddCVid_0_MASK 3665 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define PM_FUSES_5__VddCVid_0_MASK 0xff000000
PM_FUSES_5__VddCVid_0_MASK 3663 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define PM_FUSES_5__VddCVid_0_MASK 0xff000000
PM_FUSES_5__VddCVid_0_MASK 2863 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define PM_FUSES_5__VddCVid_0_MASK 0xff000000