PM_FUSES_4__BapmVddCVidLoSidd_5_MASK 3655 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define PM_FUSES_4__BapmVddCVidLoSidd_5_MASK 0xff0000
PM_FUSES_4__BapmVddCVidLoSidd_5_MASK 3653 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define PM_FUSES_4__BapmVddCVidLoSidd_5_MASK 0xff0000
PM_FUSES_4__BapmVddCVidLoSidd_5_MASK 2853 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define PM_FUSES_4__BapmVddCVidLoSidd_5_MASK 0xff0000