PM_FUSES_2__TDC_VDDC_PkgLimit_MASK 3799 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define PM_FUSES_2__TDC_VDDC_PkgLimit_MASK 0xffff0000
PM_FUSES_2__TDC_VDDC_PkgLimit_MASK 3467 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define PM_FUSES_2__TDC_VDDC_PkgLimit_MASK 0xffff0000